.ALIASES
Q_Q1            Q1(c=VOUT b=N17134 e=0 ) CN @CH4_EX4-1.SCHEMATIC1(sch_1):INS17142@BIPOLAR.Q2N2222.Normal(chips)
V_VCC           VCC(+=N17184 -=0 ) CN @CH4_EX4-1.SCHEMATIC1(sch_1):INS17206@SOURCE.VDC.Normal(chips)
V_Vs            Vs(+=VS -=0 ) CN @CH4_EX4-1.SCHEMATIC1(sch_1):INS17256@SOURCE.VSIN.Normal(chips)
R_R1            R1(1=N17134 2=N17184 ) CN @CH4_EX4-1.SCHEMATIC1(sch_1):INS17050@ANALOG.R.Normal(chips)
C_Cc            Cc(1=N19123 2=N17134 ) CN @CH4_EX4-1.SCHEMATIC1(sch_1):INS17296@ANALOG.C.Normal(chips)
R_R2            R2(1=0 2=N17134 ) CN @CH4_EX4-1.SCHEMATIC1(sch_1):INS17070@ANALOG.R.Normal(chips)
R_Rs            Rs(1=VS 2=N19123 ) CN @CH4_EX4-1.SCHEMATIC1(sch_1):INS19018@ANALOG.R.Normal(chips)
R_RC            RC(1=VOUT 2=N17184 ) CN @CH4_EX4-1.SCHEMATIC1(sch_1):INS17092@ANALOG.R.Normal(chips)
_    _(vs=VS)
_    _(vout=VOUT)
.ENDALIASES
