.ALIASES
C_C1            C1(1=0 2=VC ) CN @CHAP12_EX12-11.SCHEMATIC1(sch_1):INS11395@ANALOG.C.Normal(chips)
R_RA            RA(1=N15449 2=VCC ) CN @CHAP12_EX12-11.SCHEMATIC1(sch_1):INS11186@ANALOG.R.Normal(chips)
C_C2            C2(1=0 2=N17072 ) CN @CHAP12_EX12-11.SCHEMATIC1(sch_1):INS11460@ANALOG.C.Normal(chips)
R_RB            RB(1=VC 2=N15449 ) CN @CHAP12_EX12-11.SCHEMATIC1(sch_1):INS11220@ANALOG.R.Normal(chips)
R_R3            R3(1=0 2=VOUT ) CN @CHAP12_EX12-11.SCHEMATIC1(sch_1):INS16523@ANALOG.R.Normal(chips)
V_V1            V1(+=VCC -=0 ) CN @CHAP12_EX12-11.SCHEMATIC1(sch_1):INS11021@SOURCE.VDC.Normal(chips)
X_U1            U1(GND=0 TRIGGER=VC OUTPUT=VOUT RESET=VCC CONTROL=N17072 THRESHOLD=VC DISCHARGE=N15449 VCC=VCC ) CN
+@CHAP12_EX12-11.SCHEMATIC1(sch_1):INS22597@ANL_MISC.555alt.Normal(chips)
_    _(vc=VC)
_    _(VCC=VCC)
_    _(vout=VOUT)
.ENDALIASES
