.ALIASES
R_RE            RE(1=0 2=N07240 ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7244@ANALOG.R.Normal(chips)
C_Cc2           Cc2(1=N07416 2=VOUT ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7487@ANALOG.C.Normal(chips)
V_V2            V2(+=VCC -=0 ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7024@SOURCE.VDC.Normal(chips)
R_RS            RS(1=N07154 2=N07168 ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7054@ANALOG.R.Normal(chips)
V_V4            V4(+=0 -=VEE ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7298@SOURCE.VDC.Normal(chips)
R_RL            RL(1=0 2=VOUT ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7548@ANALOG.R.Normal(chips)
R_R2            R2(1=0 2=N07122 ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7094@ANALOG.R.Normal(chips)
R_R1            R1(1=N07122 2=VCC ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7132@ANALOG.R.Normal(chips)
R_RC            RC(1=N07416 2=VCC ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7388@ANALOG.R.Normal(chips)
C_Cc1           Cc1(1=N07168 2=N07122 ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7172@ANALOG.C.Normal(chips)
C_CE            CE(1=0 2=N07240 ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7422@ANALOG.C.Normal(chips)
V_V3            V3(+=N07154 -=0 ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7188@SOURCE.VAC.Normal(chips)
Q_Q22           Q22(c=N07416 b=N07122 e=N07240 ) CN @CHAP8_EX8-11.SCHEMATIC1(sch_1):INS7212@BIPOLAR.Q2N3904.Normal(chips)
_    _(VCC=VCC)
_    _(vout=VOUT)
_    _(VEE=VEE)
.ENDALIASES
