.ALIASES
V_V2            V2(+=0 -=VEE ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS9632@SOURCE.VDC.Normal(chips)
V_V1            V1(+=VCC -=0 ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS9652@SOURCE.VDC.Normal(chips)
R_R4            R4(1=N09726 2=N09934 ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS9894@ANALOG.R.Normal(chips)
C_C2            C2(1=N09934 2=VOUT ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS9916@ANALOG.C.Normal(chips)
R_R2            R2(1=N09682 2=N09726 ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS10000@ANALOG.R.Normal(chips)
X_U1            U1(+=N09682 -=0 V+=VCC V-=VEE OUT=N09726 ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS9750@EVAL.uA741.Normal(chips)
V_VD            VD(+=N09978 -=0 ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS10261@SOURCE.VDC.Normal(chips)
R_R1            R1(1=VOUT 2=N09682 ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS10020@ANALOG.R.Normal(chips)
D_D1            D1(1=0 2=N09844 ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS9794@DIODE.D1N750.Normal(chips)
D_D2            D2(1=N09726 2=N09844 ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS9820@DIODE.D1N750.Normal(chips)
X_U2            U2(+=N09978 -=N09934 V+=VCC V-=VEE OUT=VOUT ) CN @CHAP12_EX12-9.SCHEMATIC1(sch_1):INS9856@EVAL.uA741.Normal(chips)
_    _(VEE=VEE)
_    _(VCC=VCC)
_    _(vout=VOUT)
.ENDALIASES
