.ALIASES
R_R2            R2(1=N00092 2=VOUT ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):I00009@ANALOG.R.Normal(chips)
C_C1            C1(1=0 2=VC ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):I01462@ANALOG.C.Normal(chips)
R_R1            R1(1=0 2=N00092 ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):I00019@ANALOG.R.Normal(chips)
D_D1            D1(1=0 2=N04813 ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):INS4108@DIODE.D1N750.Normal(chips)
V_V1            V1(+=VCC -=0 ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):I00033@SOURCE.VDC.Normal(chips)
V_V2            V2(+=0 -=VEE ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):I00035@SOURCE.VDC.Normal(chips)
D_D2            D2(1=VOUT 2=N04813 ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):INS4209@DIODE.D1N750.Normal(chips)
R_R3            R3(1=VC 2=VOUT ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):INS3781@ANALOG.R.Normal(chips)
X_U1            U1(+=N00092 -=VC V+=VCC V-=VEE OUT=VOUT ) CN @CHAP12_EX12-7.SCHEMATIC1(sch_1):I00950@EVAL.uA741.Normal(chips)
_    _(vout=VOUT)
_    _(VCC=VCC)
_    _(VEE=VEE)
_    _(vc=VC)
.ENDALIASES
