.ALIASES
C_Cc1           Cc1(1=N21247 2=N21079 ) CN @CH4_DESIGN-1.SCHEMATIC1(sch_1):INS21225@ANALOG.C.Normal(chips)
R_Rs            Rs(1=VS 2=N21247 ) CN @CH4_DESIGN-1.SCHEMATIC1(sch_1):INS21255@ANALOG.R.Normal(chips)
R_R1            R1(1=N21079 2=N21113 ) CN @CH4_DESIGN-1.SCHEMATIC1(sch_1):INS21015@ANALOG.R.Normal(chips)
R_R2            R2(1=0 2=N21079 ) CN @CH4_DESIGN-1.SCHEMATIC1(sch_1):INS21035@ANALOG.R.Normal(chips)
R_RE            RE(1=0 2=N21355 ) CN @CH4_DESIGN-1.SCHEMATIC1(sch_1):INS21057@ANALOG.R.Normal(chips)
Q_Q1            Q1(c=N21113 b=N21079 e=N21355 ) CN @CH4_DESIGN-1.SCHEMATIC1(sch_1):INS21087@BIPOLAR.Q2N2222.Normal(chips)
V_VCC           VCC(+=N21113 -=0 ) CN @CH4_DESIGN-1.SCHEMATIC1(sch_1):INS21149@SOURCE.VDC.Normal(chips)
V_Vs            Vs(+=VS -=0 ) CN @CH4_DESIGN-1.SCHEMATIC1(sch_1):INS21193@SOURCE.VSIN.Normal(chips)
_    _(vs=VS)
.ENDALIASES
