.ALIASES
R_R1            R1(1=VOUT 2=N10755 ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS11085@ANALOG.R.Normal(chips)
D_D1            D1(1=0 2=N10917 ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS10867@DIODE.D1N750.Normal(chips)
D_D2            D2(1=N10791 2=N10917 ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS10893@DIODE.D1N750.Normal(chips)
X_U2            U2(+=N11043 -=N10991 V+=VCC V-=VEE OUT=VOUT ) CN
+@CHAP12_EX12-10.SCHEMATIC1(sch_1):INS10929@EVAL.uA741.Normal(chips)
V_VD            VD(+=N11043 -=0 ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS11183@SOURCE.VDC.Normal(chips)
V_V2            V2(+=0 -=VEE ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS10705@SOURCE.VDC.Normal(chips)
V_V1            V1(+=VCC -=0 ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS10725@SOURCE.VDC.Normal(chips)
R_R4            R4(1=N10791 2=N10991 ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS10967@ANALOG.R.Normal(chips)
C_C2            C2(1=N10991 2=VOUT ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS10993@ANALOG.C.Normal(chips)
R_R2            R2(1=N10755 2=N10791 ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS11065@ANALOG.R.Normal(chips)
X_U1            U1(+=N10755 -=0 V+=VCC V-=VEE OUT=N10791 ) CN @CHAP12_EX12-10.SCHEMATIC1(sch_1):INS10823@EVAL.uA741.Normal(chips)
_    _(vout=VOUT)
_    _(VEE=VEE)
_    _(VCC=VCC)
.ENDALIASES
