.ALIASES
V_V2            V2(+=0 -=VEE ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS12533@SOURCE.VDC.Normal(chips)
V_V1            V1(+=VCC -=0 ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS12553@SOURCE.VDC.Normal(chips)
R_R1            R1(1=VIN1 2=N12681 ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS13795@ANALOG.R.Normal(chips)
V_V5            V5(+=VIN3 -=0 ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS13365@SOURCE.VSIN.Normal(chips)
R_R2            R2(1=VIN2 2=N12681 ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS14137@ANALOG.R.Normal(chips)
V_V4            V4(+=VIN2 -=0 ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS12931@SOURCE.VSIN.Normal(chips)
R_RA            RA(1=0 2=N12639 ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS12701@ANALOG.R.Normal(chips)
R_RF            RF(1=N12639 2=VOUT ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS12721@ANALOG.R.Normal(chips)
X_U1            U1(+=N12681 -=N12639 V+=VCC V-=VEE OUT=VOUT ) CN
+@CHAP11_EX11-9.SCHEMATIC1(sch_1):INS12479@OPAMP.uA741.Normal(chips)
V_V3            V3(+=VIN1 -=0 ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS12741@SOURCE.VSIN.Normal(chips)
R_R3            R3(1=VIN3 2=N12681 ) CN @CHAP11_EX11-9.SCHEMATIC1(sch_1):INS14196@ANALOG.R.Normal(chips)
_    _(VCC=VCC)
_    _(VEE=VEE)
_    _(vout=VOUT)
_    _(vin2=VIN2)
_    _(vin3=VIN3)
_    _(vin1=VIN1)
.ENDALIASES
