.ALIASES
V_V1            V1(+=VCC -=0 ) CN @CHAP12_EX12-12.SCHEMATIC1(sch_1):INS18792@SOURCE.VDC.Normal(chips)
R_RB            RB(1=VC 2=VCC ) CN @CHAP12_EX12-12.SCHEMATIC1(sch_1):INS18864@ANALOG.R.Normal(chips)
R_R3            R3(1=0 2=VOUT ) CN @CHAP12_EX12-12.SCHEMATIC1(sch_1):INS18646@ANALOG.R.Normal(chips)
C_C1            C1(1=0 2=VC ) CN @CHAP12_EX12-12.SCHEMATIC1(sch_1):INS18894@ANALOG.C.Normal(chips)
C_C2            C2(1=0 2=N18680 ) CN @CHAP12_EX12-12.SCHEMATIC1(sch_1):INS18910@ANALOG.C.Normal(chips)
X_U2            U2(GND=0 TRIGGER=VTRIGGER OUTPUT=VOUT RESET=VCC CONTROL=N18680 THRESHOLD=VC DISCHARGE=VC VDD=VCC ) CN
+@CHAP12_EX12-12.SCHEMATIC1(sch_1):INS18730@TEX_INST.TLC555/TI.Normal(chips)
V_V2            V2(+=VTRIGGER -=0 ) CN @CHAP12_EX12-12.SCHEMATIC1(sch_1):INS19257@SOURCE.VPULSE.Normal(chips)
_    _(vout=VOUT)
_    _(VCC=VCC)
_    _(vtrigger=VTRIGGER)
_    _(vc=VC)
.ENDALIASES
